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Sunday, 13 June 2010

Opening for ASIC Verification

ASIC Verification - India

Company: Infinera

Category: Engineering

City: Bangalore

Essential Functions and Key responsibilities

o Will be expected to help in verification infrastructure development, development of chip-level test plans, System Verilog/C++ based generators/checkers, etc

o Will be responsible for the definition, development and execution, in a team environment of self-checking tests for complex digital ASICs.

Educational Requirement

o Candidate's must have a Bachelor's Degree or higher in CS or EE with very good academics. Masters degree preferred.



6+ years experience in ASIC Verification.

Intimate knowledge of networking standards such as SONET, OTN/G.709, Gigabit Ethernet & Fibre Channel.

Fluent in System Verilog/C++, Perl/shell scripts.

Must have intimate knowledge of SystemVerilog/VMM verification methodologies; experience with code coverage, formal verification tools; familiarity with evolving verification technologies such as SystemVerilog/VMM.

Participation in a recent multi-million gate ASICs verification in telecom/networking area is preferred

Should have worked on developing test plans at module/chip-level for the entirety of the project

Work independently from the chip specifications to execute verification test plan;

Must have good communication skills and the ability and desire to work as a team
mail us your profile @ Connect pro management consultants


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